List of Projects for B.Tech & B.E Students

 

List of Projects:

VLSI PROJECTS LIST

S.NO	PROJECT TITLE	DESIGN
1	Energy efficient code converters using reversible logic gates	Front End
2	A VLSI implementation of train collision avoidance system using Verilog HDL	Front End
3	Parity Preserving Adder/Subtractor using a Novel Reversible Gate	Front End
4	Design of Testable Reversible Sequential Circuit	Front End
5	Xilinx Based Electronic Voting Machine	Front End
6	Design Of Random Number Generator and Checker Using Verilog HDL	Front End
7	Design Of Fault Tolerant design for reversible logic networks	Front End
8	Design of car parking system using Verilog HDL	Front End
9	Design of Home Automation System Using Verilog	Front End
10	Design Of TIC –TAC –TOE game using Verilog	Front End
11	Design And simulation of Dual elevator controller	Front End
12	Design of Automatic Washing machine control system using Verilog	Front End
13	Design of Electronic Combinational Lock System	Front End
14	Design Hamming Code using Verilog	Front End
15	Low-Cost Sorting Network Circuits Using Unary Processing	Front End
16	Design And Implementation Of Low Power 16 Bit Alu With Clock Gating	Front End
17	Design Of Reconfigurable LFSR For VLSI IC Testing In ASIC And FPGA	Front End
18	Design of Single-Event Tolerant Latches in CMOS Technology for Enhanced Scan Delay Testing	Back End
19	Design and Implementation of Pseudo Random Number Generator in FPGA & CMOS VLSI	Back End
20	Design and performance analysis of 2:1 multiplexer using multiple logic families at 180 nm technology	Back End
21	Improved Design of CMOS 1-Bit Comparator with Stacking Technique	Back End
22	A Proposed Reliable and Power Efficient 14T Full Adder Circuit Design	Back End
23	4-bit CSA using NMOS Transistors	Back End
24	Design of a Low Power and High-Speed Comparator using MUX based Full Adder Cell for Mobile Communications	Back End